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Hitachi plans 300-mm fab

By David Lammers, EE Times

Tokyo -- Hitachi Ltd. will build a 300-mm wafer fab in Japan that will be capable of making 256-Mbit DRAMs, 0.18-micron ASICs and the SH-5 RISC processor, which has yet to be designed. The line will be the third at Hitachi's Naka facilities in the Ibaragi prefecture, and is scheduled to reach full production of 20,000 wafers per month in the second half of 1999, a company spokesman said. A prototype line at the site may be ready in 1998.

Construction of the Naka 3 building was started two years ago, but was put on hold when the DRAM market soured in mid-1996. Work was recently restarted to accommodate larger wafers and tighter process rules. Hitachi's spokesman declined to specify the company's total investment in the facility.

Other chip makers from around the world have described plans to build 300-mm prototype lines in 1998 and full-production lines in 1999 or 2000. Hitachi's facility is on a timetable similar to those of other companies.

For example, Fujitsu Ltd. will build one at its Aizu complex that may begin production in the fiscal year starting April 1, 1998. Full-scale production is expected in calendar year 1999, a spokesman said. "All of the major companies want to start 0.18-micron production on 300-mm wafers, but it depends on getting the equipment and the wafer-handling systems," he said.

Though NEC Corp. has not committed to a definite timetable, executive vice president Hajime Sasaki said he expects a 300-mm prototype line to be operating at NEC's IC technology development center at Sagamihara next year. NEC Kyushu, the company's largest chip-production center, has room at its Fab 8 that will be used for 300-mm wafer production, probably in 1999, Sasaki said.

Mitsubishi Electric Corp. is planning a 300-mm wafer line at its Saijo complex on the island of Shikoku. Set to build 256-Mbit DRAMs, the line will use X-ray lithography for critical layers.

(Next article.)


(c) 1997 CMP Media, Inc

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