Intel Corporation Details 14-Nanometer System-on-Chip Process Technology

Late last year, Intel (INTC 0.64%) detailed its CPU-oriented 14-nanometer semiconductor logic manufacturing technology at the International Electron Devices Meeting, or IEDM. At the VLSI Symposium earlier this month, Intel detailed the system-on-chip variant of this 14-nanometer process aimed at a wide variety of applications ranging from cellular basebands and radio-frequency chips to tablet and smartphone applications processors.

In this article, I'll address the technology described in Intel's paper and give the reader a sense of how this technology compares to Intel's older 22-nanometer technology and, in some cases, against competing 14/16-nanometer technologies.

More transistor options, better transistors
To support the broad range of applications the company is targeting with this process, Intel has made a number of additions and changes from the CPU process. For example, the technology now includes high-voltage input/output transistors that Intel said raises the "voltage ceiling" to 3.3 volts.

Even when a transistor is "off" (a popular analogy used to describe transistors is as "on/off" switches), it still consumes power. EE Times described leakage current as a "phenomenon that causes transistors to consume power during their off state." So it's no surprise that for applications such as smartphone applications processors, lower leakage transistors are necessary.

According to Intel, the 14-nanometer system-on-chip process includes much lower-leakage transistors that "lower the leakage floor" of the technology by "three orders of magnitudes [sic]."

The process supports high-speed logic transistors (the kinds used in traditional high-performance CPUs) and low-power logic transistors, as well as the high-voltage I/O transistors mentioned above. All three transistor flavors appear to deliver significant drive current improvements over their 22-nanometer counterparts.

A focus on density for SoCs
Unlike high-performance CPUs, where performance is the key focus, transistor density is crucial for highly integrated system-on-chip products, even if it comes at the expense of peak performance. According to the Intel paper, CPU technologies "emphasize lower [resistance capacitance] through wide interconnects"; the system-on-chip technology that Intel is describing is focused on density (at the expense of higher RC, and this lower interconnect performance).

Source: Intel.

On the left in the image above is a CPU interconnect stack, while a system-on-chip interconnect stack is on the right. The CPU interconnect stack has fewer of the finer pitch metal layers (which enable better density) and several very thick layers. In contrast, the system-on-chip interconnect has many of the very fine pitch metal layers to enable significantly better density.

This is why, for example, density comparisons of a system-on-chip such as the Apple (AAPL -0.22%) A8 with high-performance CPUs like Intel's Core M are pretty much useless. By design, something like the Core M will trade density for the ability to deliver higher frequencies while the A8 can be much denser but won't run as fast.

SRAM bit-cell sizes
According to the paper, Intel's 14-nanometer process supports three different types of SRAM memory cells (used for things like on-chip caches). The first is the high-performance cell that measures in at 0.0706 um^2. The next is the low-voltage cell, which Intel described at IEDM, which comes in at 0.0588 um^2. Last is the high-density cell, which has an area of 0.0499 um^2.

According to TSMC's (TSM 0.16%) paper at IEDM, describing its 16-nanometer FinFET Plus process, the company's 16 FinFET Plus high-density SRAM cell measures at 0.070 um^2. This means Intel's high-density cell in its 14-nanometer SoC technology is -- if my math is correct -- 28.7% denser than TSMC's and about 22% denser than Samsung's.

Solid sounding process, but we need to see good products
From what Intel has described, its 14-nanometer system-on-chip process looks like a solid foundation for a wide variety of applications. The first products built on this technology, the recently released Atom x5/x7 chips, weren't all that impressive, though.

However, I expect more impressive products with this technology in 2016. In particular, I'm looking forward to seeing Intel's first 14-nanometer integrated applications processors and basebands, as well as its second-generation 14-nanometer stand-alone applications processor, Broxton.