Why Intel's Moore's Law Slip Won't Significantly Impact Its Server Chip Plans

A wafer of Intel's Xeon E5 v3 processors. Source: Intel. 

On a recent conference call hosted by Pacific Crest, Jason Waxman, general manager of Intel's (NASDAQ: INTC) Cloud Platforms Group, answered many questions about the company's data center group. Of note, when Waxman was asked about the potential impact of the company's recent 10-nanometer manufacturing push-out, he indicated that there was no significant change to its server-related chip road map as a result of this.

Let's take a closer look at just why this is the case.

Server chips tend not to use bleeding-edge technologies
Over the last several product generations, Intel's mainstream (i.e., the mainstay 2-socket parts) server processors have tended to lag their higher-volume consumer-oriented brethren in terms of architecture/manufacturing technology by at least a year:

Source: Intel ARK database, leaked Intel documents; * denotes expected future release window.

The gap between the first client processors using a particular architecture and the first two-socket server processors has, over the last several generations, been at least a year.

Here's why the 10-nanometer delay is unlikely to impact Xeon E5
Based on an Intel document that leaked to the Web, the company plans to transition its Xeon E5 server products to the 14-nanometer Broadwell architecture in the first quarter of 2016. Since Intel seems to give its server chips at least a year in the marketplace, the earliest I would expect to see Skylake-based Xeon E5 chips in the market is the first quarter of 2017, with the second quarter of 2017 seeming more likely.

Assuming that Intel plans to give Skylake-EP at least a year in the market before replacing it with the 10-nanometer Cannonlake-EP, then the earliest investors should expect to see Cannonlake-EP would be in the first quarter of 2018 (assuming an aggressive Q1 2017 launch of Skylake-EP).

Realistically, though, I'm expecting Skylake-EP to arrive in the second quarter, and it wouldn't be farfetched to think that Cannonlake-EP could come a year and a quarter following Skylake-EP, which would land it in the third quarter of 2018.

This, unsurprisingly enough, would be about a year after Intel launches its first 10-nanometer client products.

What about those Xeon D chips?
Earlier this year, Intel launched its first Xeon D processors. These are single-socket server chips that Intel says are aimed at "lightweight" hyper-scale workloads, "dense, low-power" storage applications, and networking applications.

Intel launched its first Xeon D processor in the first quarter of 2015, just two quarters after the first client-oriented Broadwell parts hit the market.

If the company aims to launch Xeon D chips at roughly yearly clip, then it would be reasonable to expect the first Skylake-based Xeon D chips to hit the market in the first half of 2016. Following that would, naturally, be the first 10-nanometer Cannonlake-based Xeon D processors, in the first half of 2017.

Given Intel's 10-nanometer slip, it would now be more reasonable to expect the first 10-nanometer Xeon D to hit the market in the second half of 2017 at the earliest. This would technically be a "delay," but it'd hardly a major disruption to Intel's product road map.

Manufacturing delays stink, but Intel's data center group seems minimally affected
Although Intel's 10-nanometer delay will have an impact on its client processor road map (which is why Intel is bringing in a processor family known as Kaby Lake to fill in the gap in 2016), it shouldn't have a meaningful impact on the company's data center processor road map.