Advanced Micro Devices
Back of the Envelope Doodlings

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By Roleplayer
February 14, 2003

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As I've said here before, I'm the kind of guy who loves to play with numbers. I play bridge, I play RPG's, I play complex combat games with lots of numbers.

So I was mulling over Tom's Hardware's review of the Barton and what it really means to AMD. And two interesting numbers stood out. The first was 2.50 gHz, how much they were able to o/c their Barton (many other review sites were not able to match this, but it implies at least that Barton will be tweakable for at least a couple more speed grades). The second number was 163, which THG published as their estimate for how many good Bartons AMD could expect per wafer at industry standard yields. CH is larger, evidently on a more complex manufacturing process (slower from start to finish), and of course more expensive since it needs SOI wafers, which also are currently in short supply.

So then I started thinking, just what does Barton mean to AMD's bottom line? Many here contend it means virtually nothing. Well, check my math. Dresden is supposed to manage 6,000 wafer starts per week. I cut that back to 5,000 since, after all, not everything can be Barton (and probably never will be Barton). The math winds up being over 10.5M Bartons per quarter.

So then I went to Pricewatch. Barton has three speed grades: 2500+, 2800+, and 3000+. Let us say that you'll see a significant percentage of lower speed P4 sales migrate to 2500+ Bartons if there is price parity. Every P4 on Pricewatch sells for over $100, even the old Willamettes. What are the chances that AMD could sell out its Barton line at $100 blended ASP for Bartons? At (say) $80 for the 2500+, and $120 for the 2800+, and $200 for the 3000+, AMD would be charging less than half of the comparable Intel CPU (to make up for minor performance gaps at the high end).

Now AMD hasn't made 10M Bartons in any quarter yet, so far as I can tell. But AMD is also charging a lot more for its Bartons than $100 blended ASP's, even assuming that big buyers get deep discounts. Could AMD make 5M Bartons this quarter? Seems possible but unlikely. In Q2? Seems very possible. $100 ASP or higher? Also possible. Would they sell out? Since every 2500+ Barton has both significant price advantages over the P4 at 2.4 gHz or less and some to major performance advantages, I think so. That would use up roughly half of Dresden's capacity and make AMD $500M. The other half of Dresden's capacity will go for SOI chips and TB's for mobile markets. Figure $100M for all other chips, and $200M for flash, and that exceeds the stated goal of $775M b/e.

What does this really mean? Well, Tom's could be way off base in their estimate of 163 good CPU's per wafer. And AMD might fail to sell out. But it seems to me that AMD has decided (long past time) that since it doesn't have the capacity to truly engage Intel all up and down the product line, then AMD should focus on matching Intel at the top, and at least present a compelling value for AMD's bottom. If AMD sells out while putting 50% of Dresden onto Bartons at much lower prices than AMD is charging, who needs Hammers? Or, more accurately, who needs CH until the SOI supply is steadier, yields are better, and maybe even 90 nm is here?

Because my BOTE calculations were for $100 blended Barton ASP. ASP's Pricewatch numbers suggest that $200 would be closer to the truth. And that's $1B per quarter just from Barton.

So where is my math, or THG's math, wrong?

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