Intel Corporation's Stratix 10 FPGA Is Now Sampling

Image source: Intel. 

Back in 2013, Intel (INTC -1.11%) and then-standalone programmable logic chip specialist Altera announced that the latter would build its next high-end field programmable gate array, or FPGA, known as the Stratix 10 in the former's 14-nanometer manufacturing technology. This was something of a big deal, because Altera had a long history of using Taiwan Semiconductor Manufacturing Company (TSM -2.43%) for chip manufacturing services. More importantly, it arguably represented Intel's first high-profile contract chip manufacturing win.

The Stratix 10 ultimately saw delays and for a while it wasn't even clear that Altera would continue to work with Intel to build future high-end FPGAs. That is, until Intel bought the company last year.

At long last, on Oct. 4, Intel announced that the Stratix 10 chip had begun sampling to potential customers.

Better late than never

In the world of high-performance FPGAs, there are really two major players: Intel and Xilinx (XLNX). Intel is mainly using its own manufacturing technology to build future FPGA products, while Xilinx is likely to continue to tap TSMC.

According to Intel CEO Brian Krzanich, "history tells us that the FPGA vendor who is first to a manufacturing process node enjoys a market segment share advantage over the life of that node." Unfortunately for Intel, Xilinx began sampling FPGAs built on TSMC's 16-nanometer manufacturing technology back in the first quarter of this year. This puts Xilinx about a couple of quarters ahead of Intel when it comes to sampling an FPGA manufactured in a 14/16-nanometer technology.

Based on "history," Xilinx looks poised to capture greater market share at the 14/16-nanometer manufacturing nodes than Intel. 

A potential silver lining

Although Xilinx was first to a 14/16-nanometer FPGA, it's worth pointing out that Intel claims that its 14-nanometer manufacturing technology is significantly ahead of TSMC's 16-nanometer technology, at least in terms of the density of its technology -- in other words, the number of transistors that can be packed into a given area.

Image source: Intel.

If Intel's 14-nanometer technology really delivers a significant benefit over TSMC's 16-nanometer technology, then perhaps the conventional thinking with respect to timing and ultimate market share might not hold in this case.

Intel is sampling, but it's still a way off from mass shipments

Generally speaking, there's a significant lead time between when a product begins sampling to customers and when final product is shipping in significant quantities to those customers. The delta between sampling and commercial, high-volume shipments can often be a year or even longer.

I expect that based on the sampling timelines for both Intel and Xilinx, Xilinx will wind up shipping final 14/16-nanometer chips to customers first. However, if Stratix 10 winds up being a better solution, in terms of performance, power, and/or features, then Intel could very well be positioned to edge past Xilinx in terms of 14/16-nanometer FPGA share out in time. 

Need to see better execution from Intel going forward

A while back, now former Intel CFO Stacy Smith explained at an investor conference that the execution problems on Stratix 10 were due in no small part to Altera's "having some issues with current-generation products," requiring the chipmaker to divert resources from Stratix 10 to those other products.

However, Smith made it clear that because Altera is now folded into Intel, the company will be better positioned to achieve improved time-to-market on future FPGA products manufactured on Intel technology.

Investors will just have to wait and see how it all plays out over the next couple of years. But, at least for now, the first FPGA manufactured in Intel's 14-nanometer technology is finally alive and making its way into the hands of potential customers -- a reasonable start.