How Can Intel’s Foundry Business Be "Margin Neutral"?

At the JP Morgan Technology conference, new Intel (NASDAQ: INTC  ) CEO Brian Krzanich gave a pretty interesting presentation filled to the brim with interesting/useful information (unlike the actual keynote which seemed to be mostly fluff). In this article, it is worth exploring one of the more interesting claims that Mr. Krzanich made – that Intel's foundry business would be "margin neutral." How can this even be remotely possible?

Why it initially seems weird
A quick look at the gross margin profile of the world's most successful semiconductor foundry, TSMC (NYSE: TSM  ) , shows that the foundry business isn't low margin by any stretch of the imagination. Indeed, far from it, but Taiwan Semi's 48% corporate gross margin level is quite a bit lower than Intel's – a full on chip designer and manufacturer – which tend to stay within the range of 55-65% (and over the last few years, at the high end of it).

So, at first glance, when Intel's management is out claiming that foundry will be largely "gross margin neutral" (which would tend to imply margins on the wafers in the 55-65% range), investors are likely to initially meet this with a healthy dose of skepticism. After all, given that Intel is used to collecting design and foundry margins, one would expect that the margin hit from simply building somebody else's designs would be pretty substantial.

It can be justified
Intel's "gross margin neutral" claim can be arrived to by taking into account the following factors:

  • Intel, unlike TSMC, does packaging and test services in-house (something that a TSMC customer would need to outsource to a company like Amkor or Advanced Semiconductor Engineering). This is "margin" that Intel can collect.
  • Intel's goal with foundry is to sell performance and density to customers (whom may want to build an edge on a competitor using a traditional foundry), so right off the bat Intel can probably charge premium pricing for the actual wafers.
  • Intel's yields are typically regarded as the best in the industry and beginning with the 14-nanometer generation, the company plans to have a 35% lead in density against TSMC. This means that even if Intel charges a premium for its wafers, this is offset on the customer side by transistors that are cheaper.
  • Intel's depreciation of a given factory is pretty quickly paid for by its own internal products, so once the in-house products pay for the fabs, any further wafers are simply gravy (or, from a different perspective, having others' wafers running alongside Intel's own designs helps get a particular factory paid for more quickly).

Foolish bottom line
Given these factors, it's not difficult to get those extra seven or so percentage points of gross margin advantage over a traditional foundry like TSMC in pursuing its own foundry business. It's tough to quantify these factors at each stage, but this is probably a good "broad strokes" overview of how it's feasible. It will be interesting to see how this all plays out – particularly the impact on TSMC – going forward. 

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