Intel Begins Work on 10-Nanometer Mobile Designs

One of the most useful ways to figure out what technology companies are working on is to take a look at the LinkedIn profiles of current and former employees. While there's not a ton of information to be gleaned about the specifics, we can get a sense of the timing of the development of these products in order to get a clearer picture of the product pipeline and future competitiveness.

Going over the basics
When developing a CPU, there are multiple phases. The first phase is in specifying the micro-architecture. This is the phase during which the micro-architects decide -- after a careful analysis of the kinds of software the chip will be tasked to run -- what features to include in the actual chip design. For instance, the micro-architects may specify how many integer/floating-point units the chip has, how large the caches are, how the chip handles trying to predict what branch the code it's running will try to take, and much more. A high-level view of Intel's currently shipping Silvermont architecture is shown below. 

(Source: Intel)

After the micro-architecture, the engineers take this design and implement it in silicon. This is known as the "physical design" phase, and the quality of this implementation has fairly large ramifications on power consumption, clock speed, and performance of the design. For example, Company X and Company Y can both be handed the same micro-architecture, but if Company X has a better physical design team than Company Y, then Company X will have the product that performs better per watt, since all of these mobile designs need to be judged on this metric.

Physical design has begun on 10-nanometers for Intel's next-next-next-generation Atom
Digging into some LinkedIn profiles, it's clear that Intel (NASDAQ: INTC  ) began work on the physical design of its 10-nanometer Atom products during the middle of 2013, if the following profile start dates are an indication.

(Source: LinkedIn)

With design starting around Aug. 2013 -- the above profile suggest Oct., but other profiles have engineers beginning work on this project in August -- and given that other LinkedIn profiles suggest that Merrifield physical design began in March 2011 and was launched in Feb. 2014, this would suggest a launch time frame of mid-2016. Keep in mind that Intel has significantly beefed up mobile research and development since 2011 and can probably get this design done by late 2015 if it is aggressive enough. That would make for an early 2016 launch. 

To the point about significantly increased mobile R&D, it's worth remembering the following quote from Intel CFO Stacy Smith on the fourth-quarter 2011 call: 

Importantly, we will continue to invest in our business in 2012. We are forecasting an increase in capital spending to $12.5 billion as we build the world's first high-volume manufacturing factories for 14-nanometer process technology. We are also forecasting an increase in investment in research and development of $1.8 billion.

This could be Intel's chance
Intel should already have some significant momentum by the time it gets to the 14-nanometer generation -- TSMC's (NYSE: TSM  ) partners will still likely be on 20nm planar. At the 10-nanometer generation, the game could be won if Intel's SoC micro-architecture and software groups can actually deliver the right product on time -- they did not at 22-nanometer. It'll be interesting to see the roadmap Intel presents in its November 2014 investor meeting.

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