Image source: Apple
Before Chipworks published its in-depth tear-down of the Apple (AAPL 2.15%) iPhone 7, I had expected that the A10 Fusion chip inside the device would measure in at around 150 square millimeters. Indeed, this estimate seemed reasonable in light of how many transistors (think of these as chip "building blocks") Apple said it had crammed into the chip and the manufacturing technology that it is manufactured in.
Such a chip would be substantially more expensive than the company's prior generation A9 processor, which measured in at 104.5 square millimeters (for the variant built on the same Taiwan Semiconductor Manufacturing Company (TSM +0.42%) technology that the A10 is).
Although Chipworks' tear-down does reveal that the A10 is larger than the A9, Apple appears to have performed something of a miracle with the A10 in terms of chip size.
It's not that much bigger
According to Chipworks, the A10 chip measures in at 125 square millimeters, or approximately 20% larger than the TSMC-built A9 from last year. The larger size means that Apple will be able to get fewer chips from each silicon wafer that it buys from TSMC. Since cost per wafer is unlikely to have changed much, if at all, from what Apple paid (and currently pays) for the A9, the A10 is certainly more expensive to manufacture than the A9.
However, there's a pretty significant difference between 125 square millimeters and 150 square millimeters in terms of chip cost. Let's take a closer look at the implications here for Apple, using a similar analysis to the one that I performed for the Apple A9X here.
I'll spare you the math, but the bottom line is that assuming a wafer cost of $8,400 (this estimate comes from semiconductor industry analyst Handel Jones), 80% manufacturing yields for both the 125 square millimeter and 150 square millimeter chips (note: in the real world, there is an inverse correlation between yields and chip sizes, all else equal), I get the following die costs (note: packaging and test costs add to the final chip cost, but I'm going to ignore that here):
|
A10 Actual |
A10 Hypothetical (150mm^2) | |
|---|---|---|
|
Die size (mm^2) |
125 |
150 |
|
Good dies per wafer (80% yield) |
382 |
313 |
|
Die cost ($) |
21.99 |
26.84 |
Thanks to Apple's ability to pack more functionality into a given amount of space than it could with the prior generation A10 chip, it was able to save -- at least per this, admittedly crude, estimate -- nearly $5 per chip.
Why this matters
It may not seem as though a savings of roughly $4.85 per chip is a big deal, the reality of the situation is that this savings when multiplied across the 120 million-plus iPhone 7 and iPhone 7 Plus phones that the company is likely to ship over the next year is significant -- approximately $582 million.
Moreover, even if one argues that the company's flagship iPhones shouldn't be all that cost sensitive, these phones will almost certainly be price reduced and become the company's mid-range offerings in the coming year, amplifying the value of the cost savings here.
This is an example of Apple investing significantly in research and development (I am sure that building a faster, more power efficient, and denser A10 chip relative to what the company achieved with the prior A9 wasn't easy) to ultimately help improve its product cost structures.
At the scale that Apple operates at (it ships about 200 million phones per year), it often makes a lot of sense to bear the burden of high upfront research and development costs (referred to as non-recurring engineering, or NRE, costs) to design easier-to-manufacture products.
Apple's chip team, in this Fool's view, deserves serious kudos for what it has achieved with the A10 -- it's a technological marvel that also manages to be quite cost efficient.
