Why Intel Corporation’s 14-Nanometer Server Chips are So Expensive to Make

Microprocessor giant Intel (INTC +2.50%) recently reported that its data-center group -- DCG for short -- saw revenue increase by 10% year over year during the third quarter. However, its operating profit for this business unit -- that's revenue less cost of goods sold and operating expenses -- dropped a bit.

An enormous chip, known as an FPGA, manufactured in Intel's 14-nanometer tech. Source: Intel. 

Intel's explanation for that drop ultimately boiled down to greater product manufacturing costs and increased investments in the business -- likely in the form of higher research and development spending.

There appears to be interest in a more in-depth explanation of those higher manufacturing costs. Here's my take. 

What affects chip manufacturing costs?

At a basic level, chip manufacturing costs are impacted by two major factors:

1. The cost of the silicon wafers upon which the chips are printed.
2. The size of the chip being produced.
3. The number of good chips that come off those wafers (also known as manufacturing yields).

New manufacturing technologies usually require additional processing steps to reduce chip size and improve performance. This means that investors can count on wafer costs moving up with each generation.

However, just because wafer costs continue to rise doesn't necessarily mean that chip costs must go up. New manufacturing technologies also tend to allow companies to cram more transistors -- which is what a chip is made of -- into a given area.

There are 18 cores in this chip. Intel's 2017 server processors will have up to 28. Image source: Intel. 

The goal of these area reductions is to reduce the chip area by more than the wafer cost increases, enabling a cost-per-transistor reduction. This allows a chip designer to build a more feature-packed chip for the same cost as a prior-generation product or a similar chip at a lower cost.

However, even if the first two factors combine to deliver what should be lower-cost chips, manufacturing yields can throw a wrench into that. If, on a mature process, 90% of the chips produced are salable, while on a new process only 25% of the chips produced can be sold, then even if the new process gives a 20% cost-per-transistor improvement, a chip on the older process will cost less than the same chip built on the newer process.

The Intel server chip margin connection

In the table below, I have included the chip sizes for both Intel's prior-generation server processors manufactured in a 22-nanometer process (Haswell), as well as the company's latest generation 14-nanometer server processors (Broadwell).

Source: SemiAccurate, Tom's Hardware. 

Notice that the area reduction generation over generation for these parts ranges from 30% to about 38%. Intel Executive Vice President Stacy Smith once told investors that the wafer cost increase in moving from the 22-nanometer technology to the newer 14-nanometer technology would be about 30%, so it's no surprise that Intel aimed to reduce the chip areas by around 30% to offset the increased cost per area.

So what does this have to do with Intel's server chip margins?

As discussed above, the new chips appear to be designed to be no more expensive to manufacture than their predecessors. In a situation where manufacturing yields on the older-generation chips and the newer-generation chips are at parity, Intel's margins should be roughly flat to slightly up (in the case of that MCC chip).

However, since 14-nanometer yields appear to be meaningfully worse, the 14-nanometer chips wind up being more expensive than the prior-generation 22-nanometer products. This ultimately leads to the lower margins that Intel suffered from in bringing those new chips to market.

As manufacturing yields improve on Intel's 14-nanometer technology, its manufacturing costs should come down, ultimately helping to boost margins higher.