On Nov. 6, chipmaker Advanced Micro Devices (AMD +3.66%) hosted its Next Horizon event. During that event, the company announced that Amazon (AMZN +3.51%) Web Services would begin to offer cloud computing instances based on its EPYC family of data center processors -- something that gave the company's stock a boost.
On top of that, the company talked about and showed off its second-generation EPYC processor, which goes by the code name Rome. Let's take a closer look at what AMD had to say about it.
Image source: AMD.
A solid upgrade
AMD's first-generation EPYC processor, which is also known by the code name Naples, came with 32 of the company's "Zen" processor cores and 128 PCIe 3.0 lanes (these are used to connect things like storage devices, network interface cards, and accelerators). Naples was composed of four identical chips with eight cores each connected together. Each of those chips was manufactured using GLOBALFOUNDRIES' 14nm technology.
Rome looks like a big upgrade from Naples. The chip consists of 64 of the company's newer "Zen 2" cores and 128 lanes of PCIe 4.0 connectivity.
The chip design also appears to be a radical departure from what AMD delivered with Naples. Instead of stitching together four identical silicon dies on a single package, each with CPU cores, memory controllers, PCIe lanes, and so on, Rome consists of nine individual chips on one package. Eight of those chips consist of CPU cores (and, presumably, their associated cache memory), while the final chip -- known as an input/output (I/O) die -- includes the memory controllers and PCIe lanes.
The CPU dies are manufactured using Taiwan Semiconductor Manufacturing Company's (TSM +6.75%) latest 7nm technology. During a presentation, AMD showed a slide that indicated that the 7nm technology delivers a doubling in density, half the power at identical performance, and greater than 1.25 times the performance at the same power consumption as previous-generation technology. (I checked with AMD, and a spokesman told me that these comparisons were made relative to TSMC's 16nm technology, which was an alternative to the 14nm technology from GLOBALFOUNDRIES that AMD used to build Naples.)
The I/O die, on the other hand, is manufactured on what AMD described in its press release as a "mature 14nm process technology."
This strategy of splitting the chip up into multiple individual chiplets, AMD says, translates into "much higher performance -- more CPU cores at the same power, and more cost-effective manufacture than traditional monolithic chip designs."
What AMD hopes to achieve with Rome
On the company's most recent earnings call, AMD president and chief executive officer Lisa Su said that the company had begun "sampling our next generation Rome server chip broadly across our customer base in the third quarter," noting that "feedback on this leadership product is very strong."
The executive reiterated that AMD is "on track to exit the year with mid-single-digit server unit market share based on cloud customer adoption" and added that "based on our strong competitive position and broad customer engagements, we believe we can achieve double-digit server unit share with Rome."
After Rome, the next step in AMD's server processor roadmap is a product called "Milan" that'll be based on the company's "Zen 3" processor architecture and will be manufactured using a "7nm+" technology. When I asked AMD if this meant TSMC's 7nm+ technology, a spokesman provided me with the following statement:
Based on Samsung's advanced technology roadmap, we expect to continue working closely with them to evaluate their offerings at 7nm and below.
AMD didn't disclose what manufacturing technology its "Zen 4"-based products would be built with, but the logical next step from here would be a 5nm technology from the foundry ecosystem. TSMC, for example, has said that it expects its 5nm technology to see its "production ramp in [the] first half [of] 2020."
