Over the past several years, Intel (INTC +1.07%) has been very generous in providing the die-sizes of its PC and server oriented CPUs. While this is information that ultimately becomes public as various hardware review sites make their own measurements of these chips, it still saves the investment community a lot of work. However, when it comes to mobile chips (smartphones and tablets), none of the mobile players -- Intel included -- has been very open about this information.
Guessing the size of Intel's Merrifield
A while back, Intel published the following information sheet discussing the Merrifield product, and included was a picture of the Merrifield die, albeit not at a measurement-friendly angle:
Intel's product brief clues us in on the die size of Merrifield. Source: Intel.
From this, an estimate of 70 to 75 square millimeters seemed to be reasonable, given what's known about Intel's Bay Trail system-on-chip for tablets. However, at the Global Leadership Summit in China, Intel provided a slide that helps us to confirm/refine this estimate, shown here:
Moore's Law at work! Source: Global Leadership Summit.
On the right is the system-on-chip that is part of the Merrifield platform (called Tangier) and on the left is the Intel Core 2 Duo. We know that this particular Core 2 Duo die weighs in at 111 square millimeters. Now, assuming these are to scale (and they would need to be for the slide to mean anything), we can get a pretty good estimate of the size of Tangier.
Indeed, the physical dimensions of the Core 2 Duo die image work out to 4.8 centimeters by 5.9 centimeters, or an area of 28.32 centimeters squared. The dimensions of the Tangier system-on-chip image work out to 3.8 centimeters by 4.7 centimeters, or an area of 17.86 centimeters squared. If the Core 2 Duo die is 111 millimeters squared, then the Tangier system-on-chip should weigh in at a die size of 69.93 millimeters squared.
What does this mean for the economics?
Now, this discussion is academic without a discussion of the economic implications. If we assume that the cost of a 22-nanometer FinFET wafer is about $2,700 (Handel Jones estimates $2,600 for a 28-nanometer wafer, and Intel estimates a 2%-3% cost add for FinFETs), and if we assume that Intel can yield about 90% (that means 90% of the dies on the wafer are good), then this would imply (using dimensions of 7.6 centimeters by 9.4 centimeters for the die) 845 dies per wafer and 760 good dies per wafer. This implies a die cost of $3.55.
Assuming, then, that packaging and test adds about $1.50 per unit, we're looking at a chip that essentially costs $5 to make. If Intel sells this chip for just $12, then Intel can bag 59% gross margins on it. This is a very cheap chip with an extremely good cost structure.
The Achilles' heel
While this may seem like a great low-cost chip, the problem is that this chip isn't anywhere near as integrated as it needs to be for Intel to capitalize on its low production cost. Without an integrated cellular baseband and integrated connectivity, the solution simply requires too many chips relative to what MediaTek and Qualcomm (QCOM +0.24%) currently offer. The bad news is that this will limit the Merrifield platform's penetration into the high-volume smartphone markets.
Qualcomm's Snapdragon 801 integrates far more than Intel's Atom Z3480 ("Merrifield") does. Source: Qualcomm.
The good news, however, is that Intel plans to remedy this with its 2015 product offerings at the low end known as SoFIA 3G and SoFIA LTE. These will be small die-size devices, too, but they will be built at Taiwan Semiconductor (TSM +1.40%) and not within Intel's own factories. This will lead to a performance reduction and a cost structure disadvantage relative to a part built on the 22-nanometer FinFET process, but this family of chips will be highly integrated, so it should be a net "win."
Intel's first integrated part known as SoFIA 3G partially solves Intel's integration problem. Source: Intel.
Foolish bottom line
The Merrifield platform looks nice and should find homes in the refreshes of sockets that are currently populated with the prior-generation Clover Trail+, but it doesn't look as though it will be a really high-volume runner because it isn't high performing enough for the high end and not integrated enough for the low end. That said, the X86 myth is well and truly busted, and it's all about getting the system-level integration right -- something that Intel should have fixed with its 2015 lineup.
