Intel (NASDAQ:INTC) has talked a lot about the density of its 14-nanometer chip manufacturing technology relative to competing technologies from rivals Samsung (NASDAQOTH:SSNLF) and TSMC (NYSE:TSM). In particular, Intel will tell you that its 14-nanometer process offers better density.
I would say, based on published gate pitch and metal pitch metrics, as well as high-density SRAM cell sizes from all three chipmakers, Intel is correct.
However, density is just one aspect of a chip manufacturing technology; the structure of the transistors themselves are important in determining a chip's performance. Intel will tell you that its competitors are still trying to get their first-generation FinFET transistors working while it has already advanced to its second-generation technology.
This might technically be true, but recent images published by TechInsights indicate Samsung's 14-nanometer transistors look to be closer to Intel's 14-nanometer transistors than to Intel's 22-nanometer transistors.
Let's look at the images
Here's a slide that Intel published in August 2014 juxtaposing its 14-nanometer transistor fins with its 22-nanometer transistor fins:
Notice that the 22-nanometer transistor fins have "sloped" walls while the 14-nanometer fins look more vertical. According to Intel, making the fins taller and thinner improves transistor drive current and performance.
Now, look at this image from TechInsights of Samsung's 14-nanometer FinFET transistors:
Notice that the fins look more like the Intel 14-nanometer fins than they do the Intel 22-nanometer fins. This seems to suggest that what Samsung is building with respect to the transistor fins is more in line with Intel's 14-nanometer technology than Intel's 22-nanometer technology.
In a nutshell, Intel's suggestion that Samsung's "first-generation" FinFETs are more in line with Intel's "first-generation" FinFETs doesn't seem accurate to me.
I suspect TSMC's FinFETs will look like Intel's and Samsung's 14nm
There aren't any production 16-nanometer FinFET Plus chips out in the wild yet for the likes of TechInsights and Chipworks to dissect, but I suspect that when those chips come in they'll look more like Samsung's and Intel's 14-nanometer transistors than like Intel's 22-nanometer transistors.
Why? TSMC claimed on its most recent earnings call that its 16-nanometer FinFET Plus technology can deliver about 10% more performance than Samsung's best 14-nanometer technology at the same power level. If that's the case, and given Intel's comments about making FinFETs thinner and taller to improve performance, TSMC's 16-nanometer FinFET Plus transistors will need to be relatively tall and thin.
The foundries are certainly making progress
It's pretty clear at this point that both foundries -- Samsung and TSMC -- are running very quickly in an attempt to close the technology gap with Intel. I still think Intel has a "lead" over its competitors, but it's important for Intel investors to keep an eye on the foundries' advances.
For example, TSMC said during the earnings call that the "volume ramp" of its 10-nanometer technology is expected to begin in late 2016 and start to show up in its revenue "in early 2017." If TSMC delivers this schedule, it would mean the company needed less than two years to go from high-volume production on 16-nanometer FinFET Plus to volume production on 10-nanometer.
If Real World Tech's David Kanter is right that Intel plans to shift to Quantum Well FinFETs at the 10-nanometer node, then this advance, coupled with Intel's stated density goals for 10-nanometer, should give it an obvious technology lead over the competition. If that's not the case, then getting a handle on the competitive environment could be much more involved.
Ashraf Eassa owns shares of Intel. The Motley Fool recommends Apple and Intel. The Motley Fool owns shares of Apple. Try any of our Foolish newsletter services free for 30 days. We Fools may not all hold the same opinions, but we all believe that considering a diverse range of insights makes us better investors. The Motley Fool has a disclosure policy.