During contract chip manufacturing giant Taiwan Semiconductor Manufacturing Company's (TSM -4.86%) third-quarter earnings conference call (login required), company co-CEO Mark Liu offered some updates on the company's upcoming 5-nanometer chip manufacturing technology.

Though chip manufacturing technology naming has gotten messy over the last several years, a general rule of thumb is that when comparing manufacturing technologies from a specific manufacturer, technologies labeled with smaller numbers are more advanced.

A person on stage with an iPhone playing a 3D game projected on the screen behind him.

Image source: Apple.

Liu says that the company aims to bring this technology into what the company refers to as "risk production" -- think of this as a trial run to work out the kinks in the technology to make it viable for mass production -- in the first half of 2019.

Then, a year later, TSMC expects to bring this technology into volume production -- just in time for the release of Apple's (AAPL -0.57%) 2020 iPhone.

"Development of both device performance and yield improvement are on schedule," Liu said.

Let's take a closer look at these claims -- and more.

Yield and device performance progress

For a chip manufacturing technology to go into mass production, the technology needs to hit the performance targets it provided to customers, lest their chips ultimately not deliver the kinds of user experiences customers expect.

Additionally, manufacturing yield rate is critical to a manufacturing technology being economically viable. If yield rates are too low -- meaning only a small percentage of the chips built are viable -- then the effective cost per good chip increases substantially.

On top of that, chip manufacturers usually put in a certain amount of production capacity based on a target manufacturing yield rate; if a company's yields come in substantially below the targeted yield rate, then it simply won't be able to produce enough chips to meet demand.

Claims of industry leadership

Liu said TSMC's 5-nanometer technology "will provide the best power efficiency for mobile applications in 2020."

Chip designers rely on regular improvements in both chip area (smaller is better) and performance in the manufacturing technologies that they adopt to make better chips. Those improvements ultimately translate into superior user experiences, such as enhanced camera capabilities and smooth rendering of increasingly realistic 3D worlds on mobile devices.

56% of TSMC's revenue last quarter came from the sale of chips into what the company terms the "communication" segment, which is understood to largely mean chips that go into smartphones, so providing compelling technologies to mobile chip manufacturers is critical.

Indeed, as TSMC faces fierce competition from rival chipmakers hoping to scoop up orders for Apple's future custom-designed A-series applications processors (TSMC is the sole manufacturer of Apple's A10 Fusion and A11 Bionic processors), it's more important than ever for TSMC to try to maintain leadership in the performance, power consumption, and cost of its technologies.

However, TSMC isn't just trying to court mobile processor designers with its 5-nanometer technology. Liu explained that the technology will support important features for customers interested in building products for high-performance applications, such as graphics processors, networking processors, and field-programmable gate arrays.

Though sales of high-performance computing products don't bring in the kind of revenue that mobile processors do for TSMC today, TSMC is banking on high-performance computing products to become one of its main growth engines in the years ahead, particularly as smartphone growth continues to cool off.