In 2013, chip giant Intel (INTC 1.79%) and programmable logic chip vendor Altera announced a collaboration whereby Intel would manufacture chips Altera designs. This move, Altera hoped, would give it an edge over rival Xilinx (XLNX), which relies on contract chip manufacturer Taiwan Semiconductor Manufacturing Company (TSM 4.07%) to build its chips. 

Altera's pitch to investors was simple: Since Intel's then-upcoming 14-nanometer chip manufacturing technology was superior to TSMC's then-upcoming 16-nanometer chip technology, Altera could leverage Intel's technology to build better products than Xilinx could, thereby driving market share gains for Altera. 

Intel's Stratix 10 FPGA.

Image source: Intel.

Two years later, Intel announced that it intended to acquire Altera. The acquisition closed in late 2015, and Altera became the Intel Programmable Solutions Group (PSG). 

During a recent investor conference, Intel PSG chief Dan McNamara admitted that Altera, as a standalone entity, struggled to get chips built on TSMC's 20-nanometer completed on schedule, which led to a push out in the development timeline of the follow-on product built using Intel's 14-nanometer technology. 

Fortunately, according to McNamara, it looks as if this situation won't repeat with Intel's upcoming 10-nanometer FPGA family, code-named Falcon Mesa. 

A change in development structure

"So, immediately, day one and working with [Intel CEO Brian Krzanich] and some of the [technology and manufacturing group] folks, we decided we needed to go parallel immediately," McNamara said. 

By this, the executive is referring to the idea that the company would have two distinct product teams working on two successive generations of products at a time -- or, in other words, in parallel. Such a development methodology has obvious benefits: If the product that's scheduled to come out earlier gets delayed, then that doesn't necessarily mean the follow-on product gets delayed, too. 

This development methodology change looks as if it could pay off for the company. 

10-nanometer FPGA sampling in 2018

Intel began sending out samples of its first 14-nanometer field-programmable gate array (FPGA), branded the Stratix 10 , late in 2016, and began shipping production versions of the chip to customers back in October. 

McNamara says the company has been working on 10-nanometer FPGAs for two years -- which is unsurprising, since it's been two years since Intel closed its acquisition of Altera -- and expects to begin sending out samples of those chips next year. 

An executive from Arm holding a test wafer of Intel 10-nanometer chips.

Image source: Intel.

My guess is that Intel will begin sampling those 10-nanometer FPGAs in late 2018, with production shipments commencing a year later in late 2019. 

Where does this put Altera relative to Xilinx? 

Intel has made it clear that it believes the company that's first to migrate its FPGAs to a new manufacturing technology will have a market share advantage during the life of those chips in the marketplace. 

Intel's 10-nanometer technology is roughly equivalent to TSMC's upcoming 7-nanometer technology, so to gauge Intel's potential competitiveness, it's useful to understand what Xilinx has said about its plans around its FPGAs built using TSMC's 7-nanometer technology. 

Xilinx doesn't appear to have given a specific timeline, but according to Electronic Engineering Journal, Xilinx has indicated that it intends to have its first products built on TSMC's 7-nanometer tech "ready by early 2018." 

My guess, then, is that Xilinx will begin sampling its 7-nanometer FPGAs in the first half of 2018, edging out Intel, and will begin commercial shipments a year later -- once again, beating out Intel. 

So in terms of transitioning to a manufacturing technology roughly equivalent to Intel's 10-nanometer, Xilinx seems to have an edge, which -- going by Intel's own claims -- should allow it to have market share leadership during that product generation. 

Intel's best bet, then, is to try to be less behind Xilinx during the 10-nanometer generation than it was during the 14-nanometer generation to minimize the market share gap between the two companies.