There has been a lot of talk in the press about Apple's (AAPL 0.04%) upcoming A9 chip. The focus has been on which company will manufacture the chip for the iDevice maker. Some say it will be Apple archrival Samsung (NASDAQOTH: SSNLF), others say Taiwan Semiconductor (TSM 2.02%), and still others believe the companies will split the orders.
No matter which company ultimately builds the chip, it seems a pretty safe bet it will be built on a 14/16-nanometer FinFET manufacturing process. The main improvement with these technologies over the 20-nanometer technology used to build the Apple A8 and A8X chips is the introduction of the FinFET transistor. This is widely acknowledged to boost performance while also lowering power consumption -- a win for mobile devices.
However, it is also well known the various 14/16-nanometer technologies won't improve transistor density by much, if at all. Furthermore, the additional complexity that FinFETs bring is also expected to increase manufacturing costs on a per-transistor basis relative to 20-nanometer. So, if there is little if any reduction in the area per transistor, but cost per transistor is rising, then this has some pretty interesting implications on what to expect from Apple's A9.
What are those implications, exactly?
At the iPhone 6 launch last year, Apple boasted that the A8 chip featured 2 billion transistors, about double what the prior-generation A7 chip featured. The A8 fit also into a tiny area of 89 square millimeters, smaller than the 102-square-millimeter A7 chip.
Thanks to the massive area-per-transistor reduction the 20-nanometer manufacturing technology brought over the 28-nanometer technology used in the A7, Apple could straight up double the transistor count in the A8 from the A7 and still wind up with a smaller chip.
The transistor count increase might not be as dramatic with the A9 thanks to the minimal transistor area shrinks the 14/16-nanometer processes bring. I believe Apple will increase the transistor counts slightly in order to add new functionality, but my guess is the majority of the performance gains will come from the higher frequencies that the better transistors will enable.
The A10 may widen the transistor count on the same process
The major semiconductor foundries are known to still be having yield (that is, how many good chips come out per wafer) issues with their 14/16-nanometer technologies. Indeed, the CFO of chip equipment vendor Ultratech (UTEK) claimed last week that chip designers continue to "grapple with design issues for FinFETs to achieve acceptable yields."
My guess is that for the A9, which is likely to be one of the first high-volume processors built on a foundry FinFET technology, Apple is playing it conservative on the transistor count and die size in order to keep yields acceptable (since smaller chips tend to yield better).
Once Apple and/or the foundries have a better handle on getting FinFET designs to yield, then for an A10 chip built on the same technology next year, Apple can increase the transistor count while keeping the cost structure roughly in line with the expense of the lower-transistor-count A9 chip in 2015.
