A TSMC chip wafer. Image source: TSMC.
A little while ago, a rumor came out claiming that Apple's (AAPL +0.04%) upcoming A10 processor would be built on TSMC's (TSM +1.45%) upcoming 10-nanometer chip manufacturing technology. Following this, I argued that TSMC's 10-nanometer technology simply wouldn't be ready in time based on what the company has said publicly.
Although I was confident in my reasoning, I decided to do a little more digging to verify my suspicions. To that end, I shot off an email to TSMC's Elizabeth Sun, senior director of TSMC's corporate communications division.
10-nanometer risk production
TSMC typically has two "phases" of production. The first is known as risk production. When I asked Sun about the definition of risk production a few years ago, she indicated that it means that customers can submit chip designs for "small quantity production" and that it also means that the technology has been "qualified."
TSMC had previously said that its 10-nanometer technology would enter risk production in the fourth quarter of 2015. Given that it usually takes about a year or so to go from "risk production" to "high-volume production," if TSMC were still on this schedule it would be extremely tight for Apple to get the A10 in high volumes for a September launch.
According to Sun, in a recent exchange, TSMC is targeting risk production start on the 10-nanometer in the first quarter of 2016 (about a one quarter slip) but it has "already started customer product tape-out" activity on the technology.
What this means for A10
If the A10 were built on the 10-nanometer technology, TSMC's 10-nanometer timeline would suggest that Apple would only just now be able to submit 10-nanometer designs to TSMC. Furthermore, if Apple were to submit the A10 design on 10-nanometer to TSMC today, it would be about three months (typical fab cycle time) before Apple got back first silicon.
This would imply that Apple wouldn't even be able to build prototypical iPhones until around May of 2016. And if, heaven forbid, the A10 didn't work correctly on the first go, Apple would need to spend months modifying the design and waiting another three months for silicon to come back from the fab.
Another thing to keep in mind is that even if Apple nailed the design on the first try and was ready to start manufacturing the A10 in mass quantities starting in May/June, there's the question of TSMC's 10-nanometer manufacturing yields.
Just because the technology is qualified doesn't mean that the yields are any good. In fact, typically speaking, once the technology is qualified, the chip manufacturer spends about a year or so trying to ramp yields in order for the process to be economically viable for its customers.
Given the kinds of wafer volumes that Apple needs, low yields just aren't going to work. Why? Well, suppose that TSMC's A10 yields are just 50% (the goal is usually at least 80%). This means that in order for Apple to get the wafers it needs, TSMC would need to have 1.6 times the capacity that it would have in place if yields were at mature, production-worthy levels.
So, say, TSMC put in all of this extra capacity in advance (knowing it would have to ramp 10-nanometer early for Apple). Once the yields come up to good levels, TSMC would effectively have much more unit capacity in place. TSMC in this case had better be sure that many other customers are lined up to fill that extra capacity; it's not clear that enough companies are even going to bother with the 10-nanometer node given TSMC's intention to quickly move to 7-nanometer.
Bottom line: A10 is a 16-nanometer FinFET Plus part
I am completely convinced that the A10 will not be a 10-nanometer manufactured part. The word has been for some time that TSMC has won this business exclusively and that it will be a 16-nanometer FinFET Plus part, and that's what I'm counting on.
